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Anti intel hack hack (#1123)#5867

S Richardson·master 0542c8373·Created Tuesday at 1:42 PM

Merge pull request #1124 from StanfordAHA/zircon-non-split-fifos#5865

Michael Oduoza·master 1ce99612a·Created Tuesday at 2:29 AM

Merge pull request #1122 from StanfordAHA/dual-bank-mode#5852

Michael Oduoza·master 52d90815f·Created Friday at 4:59 PM

Buildkite agent fix (#1121)#5831

S Richardson·master ff7b0e4a4·Created Tue 25th Mar at 3:09 PM

Verilator test fix (#1120)#5825

S Richardson·master 39cc49cdc·Created Mon 24th Mar at 2:28 PM

conv_2_1_test_garnet

parse PE config with new input/output fifo config#5866

Maxwell Strange·conv_2_1_test_garnet e577ee36c·Created Tuesday at 2:50 AM

update rc creation to uppercase#5811

Maxwell Strange·conv_2_1_test_garnet 3dbd4c65d·Created Wed 19th Mar at 12:39 AM

added proper parsing for node tag and number#5810

Maxwell Strange·conv_2_1_test_garnet 75255e30c·Created Mon 17th Mar at 7:39 PM

add visualization and auto rc file gen#5809

Maxwell Strange·conv_2_1_test_garnet d8cec00e9·Created Mon 17th Mar at 5:44 PM

duplicate shift regs in RV mode and remove whitespaces#5783

Yuchen Mei·conv_2_1_test_garnet 69b1da8b9·Created Fri 7th Mar at 10:58 PM

zircon-non-split-fifos

Put flags around non-split-fifo code#5861

Michael Oduoza·zircon-non-split-fifos 09a63fbcd·Created Monday at 5:59 PM

mu_glb_ifc

Fix port mismatch in testbench#5859

Michael Oduoza·mu_glb_ifc a7ed3b4a2·Created Sunday at 6:13 PM

Fix clk gating for mu_rd switch#5858

Michael Oduoza·mu_glb_ifc bbb386779·Created Sunday at 5:54 PM

More cleanups#5857

Michael Oduoza·mu_glb_ifc 1e689de27·Created Saturday at 7:30 AM

Cleanups#5856

Michael Oduoza·mu_glb_ifc 4266e3622·Created Saturday at 6:44 AM

Add flag for mu-glb hw gen#5855

Michael Oduoza·mu_glb_ifc 0fa4a40b9·Created Saturday at 6:07 AM

dual-bank-mode

Reduce glb cfg register count by 1#5845

Michael Oduoza·dual-bank-mode 46be6709c·Created Thu 27th Mar at 7:45 PM

Cleanups#5844

Michael Oduoza·dual-bank-mode 9469a62a8·Created Thu 27th Mar at 5:21 AM

Make E64 hw gen use params; fix minor issue in map.c#5843

Michael Oduoza·dual-bank-mode a6d64a170·Created Thu 27th Mar at 4:55 AM

52m

Fix minor issues in io placement#5842

Michael Oduoza·dual-bank-mode bd61fdc02·Created Thu 27th Mar at 4:29 AM

50m

Clean up flow for E64 multi bank mode#5841

Michael Oduoza·dual-bank-mode 0125db744·Created Thu 27th Mar at 3:23 AM

buildkite-agent-fix

added a comment#5827

Yuchen Mei·buildkite-agent-fix 8d6e66b16·Created Mon 24th Mar at 5:01 PM

added a comment#5826

S Richardson·buildkite-agent-fix 8d6e66b16·Created Mon 24th Mar at 2:33 PM

fix malformed agent spec in pipeline#5823

S Richardson·buildkite-agent-fix b735b83f2·Created Fri 21st Mar at 6:52 PM

zircon

make sure glb_tile gets the RTL from its parent node#5824

Po-Han Chen·zircon 2cf997b8f·Created Sat 22nd Mar at 6:53 PM

legalization of PE locations#5812

Po-Han Chen·zircon 226c00328·Created Wed 19th Mar at 11:28 PM

add pe-array placement#5808

Po-Han Chen·zircon cd45fa7a6·Created Mon 17th Mar at 9:53 AM

finish memory buffer placement#5807

Po-Han Chen·zircon b7788bcfd·Created Mon 17th Mar at 6:44 AM

24s

functions used to place macros in grid done#5805

Po-Han Chen·zircon 6eff9cf1b·Created Sat 15th Mar at 6:09 AM

verilator-test-fix

last minute tweaks again#5822

S Richardson·verilator-test-fix dabb801f3·Created Fri 21st Mar at 6:36 PM

last minute tweaks again#5821

S Richardson·verilator-test-fix dabb801f3·Created Fri 21st Mar at 6:15 PM

undo log-cleanup FAIL#5820

S Richardson·verilator-test-fix 7a6dcb5a1·Created Fri 21st Mar at 6:00 PM

what happens if no/improper endgroup(s)??#5819

S Richardson·verilator-test-fix ad555cac0·Created Fri 21st Mar at 5:51 PM

improved Makefile log maybe#5818

S Richardson·verilator-test-fix 1c9083f39·Created Fri 21st Mar at 5:37 PM

flush_pond_regfile

enable the flush in pond regfile#5776

Maxwell Strange·flush_pond_regfile 7d28aadb1·Created Wed 5th Mar at 10:39 PM

verilator-fail

must include aha environment i guess#5771

S Richardson·verilator-fail 27d4182fc·Created Wed 5th Mar at 6:33 PM

must include aha environment i guess#5770

S Richardson·verilator-fail 27d4182fc·Created Wed 5th Mar at 6:33 PM

must include aha environment i guess#5769

S Richardson·verilator-fail 27d4182fc·Created Wed 5th Mar at 6:32 PM

10h

must include aha environment i guess#5728

S Richardson·verilator-fail 27d4182fc·Created Mon 24th Feb at 9:04 PM

Ready to try new verilator workflow maybe iii - on push#5727

S Richardson·verilator-fail 1f3c81a45·Created Mon 24th Feb at 8:51 PM